Remote ASIC FPGA Verification Lead UVM Engineer

Job is Expired
Location: Nationwide
Compensation: Salary
Staff Reviewed: Wed, Jul 14, 2021

Job Summary

A technology innovator has a current position open for a Remote ASIC FPGA Verification Lead UVM Engineer.

Core Responsibilities of this position include:

  • Developing and leading execution of FPGA verification plan
  • Architecting UVM chip level verification environments for multiple FPGAs
  • Developing reusable agents, top level testbench modules and environments

Qualifications for this position include:

  • BS Degree in electrical/computer engineering and 9+ years of professional relevant experience
  • OR, a Masters in electrical/computer engineering and 7+ years of professional relevant experience
  • 5+ years of experience in the verification of ASICs / FPGAs
  • 3+ years of experience with modern verification methodologies like UVM, OVM or VMM
  • Experience in FPGA FW development and/or FPGA process

COMPLETE JOB DESCRIPTION

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