Remote Senior PCIe Design Verification Engineer

This job has been removed

Location: Nationwide

Compensation: Salary

Staff Reviewed: Fri, Feb 12, 2021

This job expires in: 15 days

Job Category: Engineering

Remote Level: 100% Remote

Weekly Hours: Full Time

Employer Type: Employer

Career Level: Experienced

Education Level: Bachelors

Job Summary

An engineering solutions company is searching for a person to fill their position for a Remote Senior PCIe Design Verification Engineer.

Candidates will be responsible for the following:

  • Completing Functional Verification of the 3rd party PCIe PHY IP
  • Verifying the various protocols including clocking, reset, and DFT
  • Quickly finding bugs in the design protocols

Required Skills:

  • 12+ years of Design Verification experience including working with RTL Developers
  • Experience debugging in an RTL simulation environment including waveform-based debugging
  • Deep knowledge of full stack PCIe Gen4/5 (TLP, DLL, LTSSM, MSI, PHY bringup, Device Enum, etc.)
  • Experience with Functional (Design) Verification at the SOC or “Full-Chip” level
  • Experience with PCIe Physical Layer (PHYs) and PCIe controllers – especially the transport layers

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