Job Summary
A global engineering and technology solutions company is seeking a Telecommute ASIC FPGA Verification Engineer.
Core Responsibilities of this position include:
- Implementing a SystemVerilog test environment
- Developing a planning and architecture document
- Developing requirements trackability matrix and documentation
Qualifications for this position include:
- Experience verifying hierarchically partitioned large ASICs
- SystemVerilog/C++ co-simulation experience
- Overall knowledge of the ASIC development process
- Ability to create a complex constrained random test environment
- Strong understanding of Object Oriented Programming (classes, methods, polymorphism)
- Strong understanding of typical design structures (FIFO’s, pipelines, memories, state machines)
