Lead ASIC Design Engineer

Location: Remote
Compensation: To Be Discussed
Reviewed: Tue, May 12, 2026
This job expires in: 30 days

Job Summary

A company is looking for a Lead ASIC DFT Engineer.

Key Responsibilities
  • Lead end-to-end ASIC/SoC DFT implementation and sign-off
  • Drive scan insertion, scan stitching, scan compression, and ATPG flows
  • Implement and debug MBIST/LBIST solutions and support silicon bring-up and post-silicon debug
Required Qualifications
  • 10+ years of ASIC DFT experience
  • Strong expertise in ATPG, Scan, MBIST/LBIST, and silicon debug
  • Hands-on experience with Synopsys, Cadence, and Siemens/Mentor tools
  • Experience with Tessent, scan compression, and hierarchical DFT flows
  • Strong understanding of RTL, synthesis, LEC, and physical design flows

COMPLETE JOB DESCRIPTION

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