Lead ASIC/FPGA Design Engineer

Location: Remote
Compensation: Salary
Reviewed: Thu, Apr 23, 2026
This job expires in: 30 days

Job Summary

A company is looking for a Lead ASIC/FPGA Design Engineer.

Key Responsibilities:
  • Deliver an end-to-end ASIC/FPGA modem solution
  • Lead the micro-architecture and RTL development for key DSP blocks in the coherent modem
  • Collaborate with system architects and DSP algorithm developers to translate DSP specifications into robust RTL designs
Required Qualifications:
  • Active Security Clearance, or eligibility to obtain one
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
  • 5+ years of hands-on experience in RTL design for high-speed digital communications
  • Proficiency in logic design concepts and RTL coding using Verilog/System Verilog
  • Demonstrated ability to ensure RTL designs meet industry or company standards

COMPLETE JOB DESCRIPTION

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