Principal DFT Engineer

Job Summary

Owning the DFT strategy for next-generation AI inference accelerators, the remote Principal DFT Engineer will define the DFT architecture, implement hands-on DFT solutions, and drive pre-silicon verification to ensure high-quality silicon bring-up.

Key Responsibilities

• Define and maintain the DFT architecture for Asimov and future ASIC generations
• Architect and implement DFT features such as scan insertion and memory BIST, integrating them into RTL
• Develop comprehensive DFT verification plans and validate functionality through simulation and gate-level verification

Required Qualifications

• BS, MS, or PhD in Electrical Engineering or Computer Engineering
• 12+ years of ASIC development experience with extensive hands-on DFT implementation
• Strong understanding of scan architectures, ATPG, and structural coverage analysis
• Experience with leading DFT tool suites and strong RTL skills using Verilog/SystemVerilog
• Demonstrated ability to drive technical execution across cross-functional engineering teams