Job Summary
A computer hardware manufacturer has a current position open for a Remote Design Verification Engineer.
Core Responsibilities Include:
- Planning testing approach, choosing an appropriate toolset and methodology, and test coverage prioritisation
- Developing an ASIC verification strategy and associated infrastructure
- Implementing scalable/reusable verification components using UVM methodology
Qualifications for this position include:
- BS, MS or PhD in computer engineering, electrical engineering, computer science, or equivalent knowledge
- Demonstrable experience in verification test plan and strategy development and environment setup
- Expertise in industry standard verification languages including SystemVerilog, and methodologies such as UVM
- Adept in directed and constrained random testing