Job Summary
A company that provides engineering services and solutions to the semiconductor and electronics industries has a current position open for a Remote Senior Design Verification Engineer in Dallas.
Must be able to:
- Write a verification test plan using random techniques and coverage analysis
- Develop tests and tune the environment to achieve coverage goals
- Own and debug failures in simulation to root cause problems
Applicants must meet the following qualifications:
- Experience with SystemVerilog, preferably UVM
- Experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment
- Experience with scripting language such as Python or Perl and EDA Verification tools
- Experience with Object-Oriented Design and implementation
- Sharp debug skills