Job Summary
An engineering solutions company is in need of a Remote Senior Design Verification Engineer in Santa Clara.
Candidates will be responsible for the following:
- Developing and enhancing SystemVerilog / UVM-based testbenches to verify new features for client, server, graphics, and semi-custom interconnects
- Mentoring junior engineers
- Interacting with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop deep expertise in the Infinity Fabric architecture
Skills and Requirements Include:
- Architected and developed complex verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar •
- Exposure to RTL design, software development, formal verification, or other related domains
- BSEE required
