Job Summary

An engineering solutions company is seeking a Remote Senior Low Power Design Verification Engineer.

Must be able to:

• Drive the Design Verification with a focus on Low Power Design Verification
• Develop testplans, create environments and implement scoreboards
• Resolve issues and bugs

Skills and Requirements Include:

• 7+ years of proven experience as a DV engineer
• Hands-on experience in Coverage Driven verification
• Hands on experience with SystemVerilog and UVM
• Hands on Experience with Synopsys VCS / Verdi or Cadence Incisive simulators
• In depth experience with UPF based simulation flows
• BSEE