Senior ASIC Design Engineering Manager

Job Summary

Leading the RTL design engineering team, the full-time Senior ASIC Design Engineering Manager will drive the full-lifecycle development of high-performance networking ASICs, manage schedules, and oversee talent acquisition in a remote work environment.

Key Responsibilities

• Own ASIC RTL delivery schedules and track progress against committed plans
• Utilize data-driven insights to predict schedule risks and manage resource allocation
• Lead long-term headcount planning and organizational design for the ASIC department

Required Qualifications

• 15+ years in the semiconductor industry, with at least 5 years in people management
• B.S. or M.S. in Computer Engineering, Electrical Engineering, or a related field
• Deep understanding of the interaction between design, verification, emulation, and physical design teams
• Proven ability to lead engineering organizations through multiple full-cycle ASIC product launches
• Strong technical expertise in microarchitecture development, RTL coding, and verification methodologies