Senior FPGA Verification Engineer

Job Summary

Offering a remote opportunity, the Senior FPGA Verification Engineer will provide technical oversight and guidance on UVM methodologies, ensuring compliance with DO-254 objectives while leading verification activities for multiple FPGAs in an aerospace development program.

Key Responsibilities:

• Independently evaluate UVM testbench architecture and coding practices, providing technical oversight and recommendations for improvements
• Review and assess verification plans, requirements traceability, and audit verification artifacts for compliance with DO-254 standards
• Guide distributed engineering teams on UVM best practices and participate in formal reviews as an independent technical reviewer

Required Qualifications:

• Bachelor's/Master's degree in Electrical Engineering, Computer Engineering, or Computer Science
• 10+ years of experience in FPGA/ASIC verification, preferably in aerospace
• Deep expertise in System Verilog and UVM, including architecture-level design of UVM environments
• Strong understanding of DO-254 and requirements-based testing methodologies
• Experience performing independent technical reviews and compliance assessments