Senior PCIe ASIC Design Engineer

Job Summary

Leading the design and integration of PCIe controllers into next-generation SoCs, the full-time Senior PCIe ASIC Design Engineer will manage end-to-end integration, collaborate with cross-functional teams, and drive performance optimization efforts while working remotely from within the United States.

Key Responsibilities:

• Own end-to-end integration of PCIe IP into complex ASIC designs
• Collaborate with IP vendors and various engineering teams to deliver robust PCIe subsystems
• Lead silicon bring-up and validation of PCIe links in the lab, troubleshooting functional and performance issues

Required Qualifications:

• BS/MS in Electrical Engineering, Computer Engineering, or related field
• 10+ years of industry experience in ASIC/SoC design with a focus on PCIe controller integration
• Proven experience in silicon bring-up and debug of high-speed interfaces
• Solid understanding of the PCIe protocol stack and link training
• Hands-on experience with PCIe verification environments and performance tuning