Staff Physical Design Engineer

Job Summary

To drive the physical implementation of next-generation semiconductor chips, the full-time Staff Physical Design Engineer will manage block-level and top-level design tasks, tackle timing closure and power challenges, and collaborate with cross-functional teams in a remote work environment.

Key Responsibilities

• Drive block-level and top-level physical design, including floor-planning, placement, clock tree synthesis (CTS), and routing
• Achieve aggressive timing, power, and area (PPA) targets through advanced timing closure techniques
• Develop and maintain automation scripts (Tcl/Python) to streamline design flows and methodologies

Required Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
• 10-15 years of dedicated experience in physical design
• Strong understanding of EDA implementation flows with extensive experience using Cadence design tools
• Deep understanding of static timing analysis (STA) concepts and advanced timing closure methodologies
• Proficiency in low-power design techniques and EM/IR check resolution