Telecommute Senior PCIe Design Verification Engineer in Austin

Job Summary

An engineering solutions company is filling a position for a Telecommute Senior PCIe Design Verification Engineer in Austin.

Individual must be able to fulfill the following responsibilities:

• Using SV/UVM environments with the goal of quickly finding bugs in the design
• Verifying the various protocols including clocking, reset, and DFT for the subsystem

Required Skills:

• Experience with Functional Verification at the SOC or “Full-Chip” level
• Experience with PCIe Physical Layer and PCIe controllers
• Expertise with SV/UVM methodology to create Verification environments and drive Functional Verification
• Experience debugging in an RTL simulation environment including waveform-based debugging
• 7+ years of Design Verification experience including working with RTL Developers