Verification Engineer

Job Summary

To support a growing engineering team, the fully remote Verification Engineer will develop and execute verification strategies for complex digital IP, design scalable verification environments, and collaborate with architecture and RTL teams to ensure functional correctness.

Key responsibilities

• Develop and execute comprehensive verification strategies to validate complex digital IP
• Design, implement, and maintain SystemVerilog-based verification environments, including testbenches and checkers
• Create and track detailed verification plans to ensure complete feature coverage and compliance with design specifications

Required qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent experience
• Demonstrated experience verifying complex digital designs using SystemVerilog and modern verification methodologies
• Hands-on experience with DisplayPort, Display Stream Compression (DSC), or related display interface technologies
• Strong understanding of digital system design, integration, and verification for sophisticated hardware IP
• Proven ability to create structured verification plans and develop reusable verification components