ASIC FPGA Verification Engineer

Job Summary

To support the development of advanced digital systems for mission-critical applications, the contract-to-direct Advanced ASIC / FPGA Verification Engineer will define and execute verification strategies, design UVM test environments, and collaborate with engineering teams, with options for remote or onsite work in Scottsdale, AZ.

Key Responsibilities

• Define and execute ASIC and FPGA verification strategies throughout the product development lifecycle
• Design, develop, and maintain UVM-based verification environments and testbenches
• Collaborate with design engineers on architecture, interfaces, integration, and verification planning

Required Qualifications

• 5+ years of ASIC or FPGA verification experience with a Bachelor's degree, or 3+ years with a Master's degree
• 5+ years of experience using SystemVerilog and Universal Verification Methodology (UVM)
• 3+ years of experience developing UVM testbenches and verification components
• 3+ years of experience performing RTL simulation using Questa, ModelSim, or similar tools
• 2+ years of experience using scripting languages such as Python, Tcl, or Shell Scripting