Design Verification Engineer
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Job Summary
Seeking a Senior Design Verification Engineer for a full-time remote position, who will focus on hands-on verification using C/C++ and frameworks like Teal/Truss while ensuring robust debugging and problem-solving throughout the design process.
Key responsibilities:
- Manage design verification processes using C/C++ programming languages
- Utilize C++ verification frameworks to enhance verification efficiency
- Debug and resolve issues related to design verification, particularly in DSP and Ethernet protocols
Required qualifications:
- Strong programming experience in C or C++
- Substantial hands-on experience with C++ verification frameworks
- Verification expertise specifically using C++ instead of SystemVerilog/UVM
- Knowledge of DSP and/or Ethernet protocols is highly preferred
- Proven debugging skills in verification environments
Complete Job Description
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