DFT Verification Engineer

Job Summary

Seeking a full-time remote DFT Verification Engineer, the role is responsible for ensuring the functionality and quality of ASIC DFT logic by building robust verification environments, executing coverage-driven verification plans, and collaborating closely with design and manufacturing engineers.

Key Responsibilities:

• Develop, implement, and maintain RTL verification environments using UVM or equivalent methodologies
• Create and execute coverage-driven verification plans aligned with design specifications
• Analyze simulation results and debug complex verification and design issues in collaboration with DFT design engineers

Required Qualifications:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
• 5+ years of experience in digital design verification, with at least 2 years in DFT verification
• Strong hands-on experience with UVM-based or similar verification methodologies
• Proficiency in SystemVerilog and experience with scripting (preferably Python)
• Experience with industry-standard EDA DFT tools (e.g., Synopsys TestMax, Siemens Tessent)