High-Speed Analog Layout Engineer
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Job Summary
To support advanced technology projects, the contract-based High-Speed Analog Layout Engineer will design physical silicon layouts for high-speed mixed-signal circuits while working remotely for a duration of 6-12 months.
Key responsibilities
- Design block-level and chip-top-level floor plans and manage hierarchical block integration
- Address layout-dependent effects and implement noise control measures for high-frequency circuits
- Ensure compliance with design rules and reliability standards through thorough verification processes
Required qualifications
- 8-12 years of hands-on custom IC layout experience in deep sub-micron or advanced CMOS/FinFET nodes
- Proficiency with TSMC 4NM technology
- Experience with high-speed mixed-signal circuit design, including SerDes, ADCs, and DACs
- Strong understanding of parasitic and noise control techniques
- Familiarity with DRC, LVS, ERC, and ESD protection standards
Complete Job Description
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