Senior ASIC Verification Engineer

Job Summary

Seeking a full-time remote Senior ASIC Verification Engineer, the ideal candidate will be responsible for verification closure of projects, including design modules and SoCs, while driving test-planning and UVM-based testbench development.

Key responsibilities:

• Define overall SOC level verification strategy and technical planning
• Develop and execute functional tests according to verification test plans
• Collaborate with cross-functional teams to ensure high design quality

Required qualifications:

• 8+ years of experience in ASIC verification with UVM/System Verilog
• Hands-on experience in verifying complex SoCs using VCS or equivalent tools
• Proficiency in debugging RTL issues using Verdi or similar tools
• Experience in ground-up testbench development
• B.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering