Senior DFT Engineer

Job Summary

Owning the end-to-end DFT implementation, the Senior DFT Engineer will define DFT micro-architecture, integrate it into RTL and third-party IP, and ensure high-quality silicon bring-up through pre-silicon validation, all in a full-time, onsite capacity.

Key Responsibilities

• Micro-architect and implement DFT instrumentation logic, including scan insertion and memory BIST
• Develop comprehensive DFT verification plans and validate DFT functionality through simulation and gate-level verification
• Collaborate with backend implementation teams to ensure successful physical realization of the DFT architecture

Required Qualifications

• A BS, MS, or PhD in Electrical Engineering or Computer Engineering
• 8+ years of ASIC development experience with multiple successful production tapeouts
• Extensive hands-on DFT implementation experience on complex SoCs
• Strong RTL design skills using Verilog/SystemVerilog
• Hands-on experience with Siemens Tessent DFT solutions