Senior RTL Design Engineer

Job Summary

Experienced in RTL design, the full-time Senior RTL Design Engineer will design, implement, and deliver high-quality RTL for complex digital systems remotely, focusing on translating architectural specifications into scalable microarchitectures and ensuring design correctness in collaboration with cross-functional teams.

Key Responsibilities:

• Design and implement RTL for complex digital subsystems using Verilog/SystemVerilog
• Translate architectural specifications into clean, efficient, and scalable microarchitectures
• Collaborate with architecture, verification, and physical design teams to ensure design correctness and closure

Required Qualifications:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
• 5+ years of experience in RTL design
• Strong hands-on experience with Verilog/SystemVerilog
• Solid understanding of synchronous digital design and microarchitecture principles
• Experience with simulation and debug tools (e.g., VCS, Questa, Verdi, DVE)